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general description the max8710/max8711/max8712/MAX8761 offer com- plete linear-regulator power-supply solutions for thin-film transistor (tft) liquid-crystal-display (lcd) panels used in lcd monitors and lcd tvs. all four devices include a high-performance av dd linear regulator, a positive charge-pump regulator, a negative charge-pump regula- tor, and built-in power-up sequence control. the max8710/max8711/MAX8761 also include a high-cur- rent operational amplifier. additionally, the max8710/ MAX8761 provide logic-controlled high-voltage switches to control the positive charge-pump output. the linear regulator directly steps down the input voltage to generate the supply voltage for the source-driver ics (av dd ). the two built-in charge-pump regulators are used to generate the tft gate-on and gate-off sup- plies. the high-current operational amplifier is typically used to drive the lcd backplane (vcom) and features high output current (150ma), fast slew rate (12v/?), and wide bandwidth (12mhz). its rail-to-rail inputs and output maximize flexibility. the max8710/MAX8761 are available in a 24-pin thin qfn package, the max8711 is available in a 16-pin thin qfn package, and the max8712 is available in a 12-pin thin qfn package. all three packages are 4mm x 4mm with a maximum thickness of 0.8mm for ultra-thin lcd panel design. the max8710/max8711/max8712 oper- ate over the -40? to +100? temperature range and the MAX8761 operates over the -40? to +85? range. applications lcd monitor panel modules lcd tv panel modules features ? high-performance linear regulator 1.6% output accuracy works with small ceramic output capacitors fast transient response foldback current limit ? 50ma negative regulated charge pump ? 20ma positive regulated charge pump with adjustable delay ? built-in power-up sequence ? high-current operational amplifier (max8710/max8711/MAX8761) ?50ma output short-circuit current 12v/? slew rate 12mhz, -3db bandwidth rail-to-rail inputs/output ? dual-mode high-voltage switches (max8710/MAX8761) ? thermal protection ? latched fault protection with timer max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ________________________________________________________________ maxim integrated products 1 fbn supcp drvn dlp posb supb outb negb mode ctl gnd inl outl fbl shdn drvp fbp src v gon vp av dd gon drn thr ref in in v goff ctl av dd vcom ref ref av dd vin max8710 MAX8761 minimum operating circuit 24 23 22 21 20 19 src fbn dlp mode fbl ctl 7 8 9 10 11 12 in outl supcp drvn drvp n.c. 13 14 15 16 17 18 gnd outb supb thr fbp shdn 6 5 4 3 2 1 negb inl posb ref drn gon max8710 MAX8761 thin qfn 4mm x 4mm top view + pin configurations ordering information part temp range pin-package pkg code m a x8 7 1 0 e tg+ -40 c to +100 c 24 thin qfn 4mm x 4mm t2444-4 m a x8 7 1 1 e te+ -40 c to +100 c 16 thin qfn 4mm x 4mm t2444-4 m a x8 7 1 2 e tc+ -40 c to +100 c 12 thin qfn 4mm x 4mm t2444-4 m a x8 7 6 1 e tg+ -40 c to +85 c 24 thin qfn 4mm x 4mm t2444-4 19-3174; rev 1; 10/05 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. pin configurations continued at end of data sheet. evaluation kit available dual mode is a trademark of maxim integrated products, inc. + denotes lead-free package.
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85? . typical values are at t a = +25?, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ctl, fbl, fbp, fbn, shdn , ref, thr to gnd........-0.3v to +6v mode, dlp to gnd ......................................-0.3v to v ref + 0.3v in, inl to gnd .........................................................-0.3v to +28v supcp, supb to gnd .............................................-0.3v to +14v outl (max8710/MAX8761) ?0.3v to +28v outl (max8711/max8712) ?0.3v to +14v posb, outb, negb to gnd .....................-0.3v to v supb + 0.3v drvn, drvp (max8710/MAX8761) .......-0.3v to (v supcp - 0.3v) drvn, drvp (max8711/max8712)...............-0.3v to (v in - 0.3v) src to gnd .............................................................-0.3v to +30v gon, drn to gnd .......................................-0.3v to v src + 0.3v drn to gon .............................................................-30v to +30v outb maximum continuous output current..................... 75ma drvp rms output current...................................................90ma drvn rms output current ...............................................-150ma continuous power dissipation (t a = +70?) 24-, 16-, and 12-pin thin qfn 4mm x 4mm (derate 16.9mw/? above +70?) ..............................1349mw operating temperature range max8710/max8711/max8712 .......................-40? to +100? MAX8761 ...........................................................-40? to +85? junction temperature........................................................+150? storage temperature range ..............................-65? to +160? lead temperature (soldering, 10s)...................................+300? parameter conditions min typ max units in operating supply range 8 28 v shdn = gnd 0.2 0.4 in quiescent current shdn = 3.3v 2.5 ma duration to trigger fault condition 2 16 oscillator clock cycles 44 ms ref output voltage -10? < i ref < 1ma (excluding internal load) 4.9 5.0 5.1 v supcp input supply range 2.7 13.2 v charge-pump regulators operating frequency 1275 1500 1725 khz thermal shutdown rising temperature, 15 c hysteresis +160 c linear regulator inl operation supply range v outl < v inl 728v i outl = 50ma (max8710/max8711/max8712) 150 300 dropout voltage i outl = 200ma (MAX8761) 200 400 mv fbl regulation voltage i outl = 50ma 2.46 2.50 2.54 v fbl input bias current v fbl = 2.5v 50 na fbl fault trip level falling edge 1.92 2.00 2.08 v v inl = v in = 10.8v~13.2v, v outl = 10v, i outl = 50ma 15 fbl line-regulation error v inl = v in = 10v~28v, v outl = 9v, i outl = 50ma 10 mv bandwidth guaranteed by design 1000 khz v fbl = 2.4v (max8710/max8711/max8712) 300 maximum outl current v fbl = 2.4v (MAX8761) 500 ma outl soft-start period 2 12 oscillator clock cycles in a 7-bit dac 2.73 ms v in = 12v, 5ma < i out < 300ma (max8710/max8711/max8712) 2 outl load regulation v in = 12v, 5ma < i out < 500ma (MAX8761) 2 %
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies _______________________________________________________________________________________ 3 electrical characteristics (continued) (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85? . typical values are at t a = +25?, unless otherwise noted.) parameter conditions min typ max units operational amplifier (max8710/max8711/MAX8761) supb supply operating range 4.5 13.2 v supb supply current buffer configuration, v posb = 4v, no load 0.7 1.0 ma input offset voltage (v negb , v posb ) = v supb / 2, t a = +25 c012mv input bias current (v negb , v posb ) = v supb / 2 -50 +1 +50 na common-mode input range v negb , v posb 0v supb v common-mode rejection ratio 0 (v negb , v posb ) < v supb 50 90 db open-loop gain 125 db i outb = 100? v supb - 15 v supb - 2 output voltage swing high i outb = 5ma v supb - 150 v supb - 80 mv i outb = -100? 2 15 output voltage swing low i outb = -5ma 80 150 mv short to v supb / 2, sourcing 50 150 short-circuit current short to v supb / 2, sinking 50 140 ma output current buffer configuration, v posb = 4v, v outb error < 10mv ?0 ma power-supply rejection ratio 6v v supb 13.2v, dc (v negb , v posb ) = v supb / 2 60 100 db slew rate 12 v/? -3db bandwidth buffer configuration, r l = 10k ? , c l = 10pf 12 mhz gain-bandwidth product buffer configuration, r l = 10k ? , c l = 10pf 8 mhz positive charge-pump regulator fbp regulation voltage i gon = 10ma 2.425 2.500 2.575 v fbp line-regulation error v outl (v supcp , max8710/MAX8761) = 10.8v~13.2v, v gon = 27v, i gon = 20ma 25 mv fbp input bias current v fbp = 2.5v -50 +50 na drvp p-channel on-resistance 15 30 ? v fbp = 2.4v 6 12 ? drvp n-channel on-resistance v fbp = 2.6v 20 k ? fbp fault trip level falling edge 1.92 2.00 2.08 v positive charge-pump soft-start period 2 12 oscillator clock cycles in a 7-bit dac 2.73 ms negative charge-pump regulator fbn regulation voltage i goff = 10ma 200 250 300 mv fbn input bias current v fbn = 250mv -50 +50 na fbn line regulation v outl (v supcp , max8710/MAX8761) = 10.8v~13.2v, v vgoff = -6v, i goff = -50ma 25 mv drvn p-channel on-resistance 7.5 15 ?
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 4 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85? . typical values are at t a = +25?, unless otherwise noted.) parameter conditions min typ max units v fbn = 350mv 3 6 ? drvn n-channel on-resistance v fbn = 150mv 20 k ? fbn fault trip level rising edge 700 mv negative charge-pump soft-start period 2 12 oscillator clock cycles in a 7-bit dac 2.73 ms sequence control shdn input low voltage 0.6 v shdn input high voltage 2.0 v shdn input current 1a dlp capacitor charge current during startup, v dlp = 1.0v 4 5 6 a dlp turn-on threshold 2.375 2.5 2.625 v shdn = low or fault tripped; dlp, fbp, fbn to gnd 10 ? pin discharge switch on-resistance shdn = low or fault tripped; mode, outl, outb to gnd max8710, shdn = low or fault trip; gon to gnd 1k ? positive gate-driver timing and control switches (max8710/MAX8761) ctl input low voltage 0.6 v ctl input high voltage 2.0 v ctl input leakage current -1 +1 ? ctl to gon rising propagation delay v mode = v ref , 1.5nf from gon to gnd, v ctl = 0 to 3v step, no load on gon, measured from v ctl = 1.5v to gon = 20% 100 ns ctl to gon falling propagation delay v mode = v ref , 1.5nf from gon to gnd, v ctl = 3v to 0 step, drn falling, no load on drn and gon, measured from v ctl = 1.5v to gon = 80% 100 ns src input voltage range 28 v src input current v mode = v ref , v dlp = 3v, ctl = high 150 250 ? drn input current v mode = v ref , v drn = 8v, v dlp = 3v, v ctl = 0v 26 40 ? src switch on-resistance v mode = v ref , v dlp = 3v, ctl = high 20 40 ? drn switch on-resistance v mode = v ref , v dlp = 3v, v ctl = 0v 60 ? mode switch on-resistance 1k ? mode 2 mode capacitor charge current v mode < mode current-source stop voltage threshold 42 50 64 a mode voltage threshold for enabling drn switch control in mode 2 2.3 2.5 2.7 v mode current-source stop voltage threshold v mode rising, c mode = 150pf 3.3 3.5 3.7 v thr to gon voltage gain 9.4 10 10.6 v/v gon falling slew rate 13.5 v/?
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies _______________________________________________________________________________________ 5 electrical characteristics (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = -40? to +100? (-40? to 85? for MAX8761), unless otherwise noted.) (note 1) parameter conditions min typ max units ref output voltage -10? < i ref < 1ma (excluding internal load) 4.9 5.1 v supcp input supply range 2.7 13.2 v charge-pump regulators operating frequency 1200 1850 khz linear regulator i outl = 50ma (max8710/max8711/max8712) 300 dropout voltage i outl = 200ma (MAX8761) 400 mv fbl regulation voltage i outl = 50ma 2.455 2.545 v fbl fault trip level falling edge 1.96 2.04 v fbl line-regulation error v inl = v in = 10.8v~13.2v, v outl = 10v, i outl = 50ma 15 mv v fbl = 2.4v (max8710/max8711/max8712) 300 maximum outl current v fbl = 2.4v (MAX8761) 500 ma v in = 12v, 5ma < i out < 300ma (max8710/max8711/max8712) 2 outl load regulation v in = 12v, 5ma < i out < 500ma (MAX8761) 2 % operational amplifier (max8710/max8711/MAX8761) supb supply current buffer configuration, v posb = 4v, no load 1.0 ma input offset voltage (v negb , v posb ) = v supb / 2 14 mv i outb = 100? v supb - 15 output-voltage-swing high i outb = 5ma v supb - 150 mv i outb = -100? 15 output-voltage-swing low i outb = -5ma 150 mv short to v supb / 2, sourcing 50 short-circuit current short to v supb / 2, sinking 50 ma positive charge-pump regulator max8710/max8711/max8712 2.425 2.575 fbp regulation voltage i gon = 10ma MAX8761 2.40 2.65 v v outl (v supcp , max8710) = 10.8v~13.2v, v gon = 27v, i gon = 20ma 25 fbp line-regulation error v outl (v supcp , MAX8761) = 10.8v ~ 13.2v, v gon = 27v, i gon = 20ma 50 mv drvp p-channel on-resistance 30 ? v fbp = 2.4v 12 ? drvp n-channel on-resistance v fbp = 2.6v 20 k ? negative charge-pump regulator fbn regulation voltage i goff = 10ma 200 300 mv fbn line regulation v outl (v supcp , max8710/MAX8761) = 10.8v~13.2v, v goff = -6v, i goff = -50ma 25 mv drvn p-channel on-resistance 15 ?
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 6 _______________________________________________________________________________________ note 1: specifications to -40 c and +85 c are guaranteed by design, not production tested. electrical characteristics (continued) (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = -40? to +100? , (-40? to +85? for MAX8761), unless otherwise noted.) (note 1) parameter conditions min typ max units v fbn = 350mv 6 ? drvn n-channel on-resistance v fbn = 150mv 20 k ? sequence control shdn input low voltage 0.6 v max8710/max8711/max8712 2.0 shdn input high voltage MAX8761 2.05 v dlp capacitor charge current during startup, v dlp = 1.0v 4 6 ? dlp turn-on threshold 2.375 2.625 v positive gate-driver timing and control switches (max8710/MAX8761) src input current v mode = v ref , v dlp = 3v, ctl = high 250 ? drn input current v mode = v ref , v drn = 8v, v dlp = 3v, v ctl = 0v 40 ? src switch on-resistance v mode =v ref , v dlp = 3v, ctl = high 40 ? mode 2 mode capacitor charge current v mode < mode current-source stop voltage threshold 42 64 a mode voltage threshold for enabling drn switch control in mode 2 2.3 2.7 v typical operating characteristics (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85?. typical values are at t a = +25?, unless otherwise noted.) max8710/max8711/max8712 linear-regulator line regulation max8710/11/12/61 toc01 input voltage (v) output-voltage error (%) 26 24 22 20 18 16 14 12 -4 -3 -2 -1 0 1 -5 10 28 v outl = 10v i outl = 50ma i outl = 300ma MAX8761 linear regulator line regulation output-voltage error (%) max8710/11/12/61 toc02 10 12 14 16 18 20 22 24 26 -2.0 -1.6 -1.2 -0.8 -0.4 0 0.4 input voltage (v) v outl = 10v i outl = 50ma i outl = 500ma max8710/max8711/max8712 linear-regulator load regulation max8710/11/12/61 toc03 load current (ma) output-voltage error (%) 100 10 -1.0 -0.5 0 0.5 -1.5 1 1000 v outl = 10v v inl = 12v
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies _______________________________________________________________________________________ 7 MAX8761 linear-regulator load regulation output-voltage error (%) max8710/11/12/61 toc04 0 100 200 300 400 500 -2.0 -1.6 -1.2 -0.8 -0.4 0 0.4 load current (ma) v outl = 10v v inl = 12v max8710/max8711/max8712 linear- regulator load transient response max8710/11/12/61 toc05 20 s/div a 10v b 0ma a: v outl , 50mv/div, ac-coupled b: i outl , 200ma/div MAX8761 linear-regulator load transient response max8710/11/12/61 toc06 40 s a b a: i outl , 200ma/div b: v outl , ac-coupled, 20mv/div max8710/max8711/max8712 linear- regulator pulsed load-transient response max8710/11/12/61 toc07 4 s/div a 10v b 0ma a: v outl , 100mv/div, ac-coupled b: i outl , 500ma/div MAX8761 linear-regulator pulsed load transient response max8710/11/12/61 toc08 10 s a b a: i outl , 500ma/div b: v outl , ac-coupled, 100mv/div max8710/max8711/max8712 linear- regulator overcurrent protection max8710/11/12/61 toc09 10ms/div a 0v b 0ma a: v outl , 5v/div b: i outl , 500ma/div max8710/11/12/61 toc10 10 s a b a: v outl , 5v/div b: i outl , 500ma/div MAX8761 linear regulator overcurrent protection charge-pump no-load supply current vs. supply voltage max8710/11/12/61 toc11 supply voltage (v) supply current (ma) 13 12 11 10 9 1.6 1.7 1.8 1.9 2.0 1.5 814 positive charge-pump load regulation max8710/11/12/61 toc07 load current (ma) output-voltage error (%) 40 20 30 10 -1.5 -1.0 -0.5 0 0.5 -2.0 050 input = 12v typical operating characteristics (continued) (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85?. typical values are at t a = +25?, unless otherwise noted.)
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 8 _______________________________________________________________________________________ typical operating characteristics (continued) (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85?. typical values are at t a = +25?, unless otherwise noted.) positive charge-pump line regulation max8710/11/12/61 toc13 input voltage (v) output-voltage error (%) 13 12 11 -0.8 -0.6 -0.4 -0.2 0 0.2 -1.0 10 14 20ma load current negative charge-pump load regulation max8710/11/12 toc14 load current (ma) output-voltage error (%) 60 80 20 40 -1.00 -0.75 -0.50 -0.25 0.25 0 -1.25 0100 v goff = -5v input = 12v negative charge-pump line regulation max8710/11/12/61 toc15 input voltage (v) output-voltage error (%) 13 12 11 10 9 8 -0.8 -0.6 -0.4 -0.2 0 0.2 -1.0 714 v goff = -5v i goff = 50ma power-up sequence max8710/11/12/61 toc16 10ms/div a 0v 0v c b 0v a: v outl , 10v/div b: v goff , 5v/div c: v gon , 10v/div max8710/MAX8761 switch control function (mode 1) max8710/11/12/61 toc17 20 s/div a 0v 0v c b 0v a: v gon , 10v/div b: v mode , 5v/div c: v ctl , 5v/div c gon = 1.5nf max8710/MAX8761 switch control function (mode 2) max8710/11/12/61 toc18 20 s/div a 0v 0v c b 0v a: v gon , 10v/div b: v mode , 5v/div c: v ctl , 5v/div c gon = 1.5nf reference load regulation max8710/11/12/61 toc19 ref load current (ma) ref voltage error (%) 0.8 0.6 0.4 0.2 -0.08 -0.06 -0.04 -0.02 0 -0.10 01.0
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies _______________________________________________________________________________________ 9 max8710/max8711/MAX8761 supb supply current vs. supb voltage max8710/11/12/61 toc21 supb voltage (v) supb supply current (ma) 12 10 8 6 0.2 0.4 0.6 0.8 1.0 0 414 buffer configuration v outb = 0.5 x v posb max8710/max8711/MAX8761 operational- amplifier small-signal step response (buffer configuration) max8710/11/12/61 toc22 400ns/div a b 0v 0v a: v posb , 50mv/div, ac-coupled b: v outb , 50mv/div, ac-coupled max8710/max8711/MAX8761 operational- amplifier large-signal step response (buffer configuration) max8710/11/12/61 toc23 400ns/div a b 0v 0v a: v posb , 5v/div b: v outb , 5v/div max8710/max8711/MAX8761 operational- amplifier load transient response (buffer configuration) max8710/11/12/61 toc24 1 s/div a b 0ma 5v a: v outb , 2v/div b: i outb , 50ma/div max8710/max8711/MAX8761 operational- amplifier rail-to-rail i/o max8710/11/12/61 toc25 40 s/div a b 0v 0v a: v posb , 5v/div b: v outb , 5v/div typical operating characteristics (continued) (circuit of figure 1. v in = v inl = v supcp = 12v, v outl = v supb = 10v, v src = 27v, t a = 0? to +85?. typical values are at t a = +25?, unless otherwise noted.) reference vs. temperature max8710/11/12/91 toc20 temperature ( c) ref voltage error (%) 80 60 40 20 0 -20 -0.4 -0.2 0 0.2 -0.6 -40 100
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 10 ______________________________________________________________________________________ pin max8710/ MAX8761 max8711 max8712 name function 1 gon inter nal h i g h- v ol tag e m os fe t s w i tch c om m on ter m i nal . gon i s the outp ut of the hi g h- vol tag e sw i tch- contr ol b l ock. gon i s i nter nal l y p ul l ed to gn d b y a 1k ? r esi stor i n shutd ow n for the m ax 8710. g on i s not p ul l ed to gn d for the m ax 8761. 2 drn switch input. drain of the internal high-voltage back-to-back p-channel mosfets connected to gon. 3 1 1 ref reference output. connect a 0.22? capacitor from ref to gnd. ref remains on in shutdown. 4 2 posb operational-amplifier noninverting input 5 3 2 inl linear-regulator supply input 6 4 negb operational-amplifier inverting input 7 5 3 in ic supply input. bypass in to gnd with a 0.1? capacitor. 8 6 4 outl linear-regulator output. outl is internally pulled to gnd by a 1k ? resistor in shutdown. for the max8711/max8712, outl is also the supply input for the charge-pump regulators. 9 supcp supply input for the charge-pump regulators. connect a 0.1? capacitor from supcp to gnd. 10 7 5 drvn negative charge-pump driver output. output high level is v supcp , and output low level is gnd. drvn is internally pulled high to supcp when the negative charge pump is disabled. 11 8 6 drvp positive charge-pump driver output. output high level is v supcp , and output low level is gnd. drvp is internally pulled low in shutdown. 12 n.c. no connection. not internally connected. 13 9 7 gnd ground 14 10 outb operational-amplifier output. outb is internally pulled to gnd by a 1k ? resistor in shutdown. 15 11 supb o p er ati onal - am p l i fi er s up p l y inp ut. byp ass s u p b to gn d w i th a 0.1f cap aci tor . 16 thr gon low-level regulation set-point input. connect thr to the center of a resistive voltage-divider between ref and gnd to set the v gon regulation level. the actual level is 10 v thr . see the switch control (max8710/MAX8761) section for details. 17 12 8 fbp positive charge-pump feedback input. connect fbp to the center of a resistive voltage-divider between the positive charge-pump regulator output and gnd to set the regulator output voltage. place the divider within 5mm of fbp. fbp is internally pulled to gnd by a 10 ? resistor in shutdown. pin description
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 11 pin max8710/ MAX8761 max8711 max8712 name function 18 13 9 shdn active-low shutdown control input. pull shdn low to turn off all sections of the device except ref. pull shdn high to enable the device. cycle shdn to reset the device after a fault. 19 ctl high-voltage switch-control block timing control input. see the switch control (max8710/MAX8761) section for details. 20 14 10 fbl linear-regulator feedback input. connect fbl to the center of a resistive voltage-divider between the linear-regulator output and gnd to set the linear- regulator output voltage. place the divider within 5mm of fbl. 21 mode high-voltage switch-control block-mode selection input and timing-adjustment input. see the switch control (max8710/MAX8761) section for details. mode is high impedance when it is connected to ref. mode is internally pulled to gnd by a 1k ? resistor during ref uvlo, when v dlp < 2.5v, or in shutdown. 22 15 11 dlp positive charge-pump startup delay and high-voltage switch delay input. connect a capacitor from dlp to gnd to set the delay time. a 5? current source charges c dlp . dlp is internally pulled to gnd by a 10 ? resistor in shutdown. 23 16 12 fbn negative charge-pump feedback input. connect fbn to the center of a resistive voltage-divider between the negative output and ref to set the output voltage. place the divider within 5mm of fbn. fbn is internally pulled to gnd through a 10 ? resistor in shutdown. 24 src switch input. source of the internal high-voltage p-channel mosfet connected to gon. pin description (continued) typical operating circuit figures 1, 2, and 3 are the typical operating circuits of the max8710/MAX8761, max8711, and max8712 for generating power rails in tft lcd panels. the input voltage range is from 10.8v to 13.2v. the av dd output is 10v at 300ma, the v gon output is 27v at 20ma, and the v goff output is -5v at 50ma. detailed description the max8710/max8711/max8712/MAX8761 include a high-performance linear regulator, a positive charge- pump regulator, a negative charge-pump regulator, and built-in power-up sequence control. the max8710/ max8711/MAX8761 also include a high-current opera- tional amplifier. additionally, the max8710/MAX8761 pro- vide logic-controlled high-voltage switches to control the positive charge-pump output. the linear regulator directly steps down the input voltage to generate the source-dri- ver ics?supply voltage. the two built-in charge-pump regulators are used to generate the tft gate-on and gate-off supplies. the high-current operational amplifier is typically used to drive the lcd backplane (vcom) and features high output current (150ma), fast slew rate (12v/?), and wide bandwidth (12mhz). its rail-to-rail inputs and output maximize flexibility. linear regulator the max8710/max8711/max8712/MAX8761 contain a linear regulator including a pmos pass transistor. the max8710/max8711/max8712 can supply an output cur- rent of at least 300ma and the MAX8761 can supply at least 500ma. connect an external resistive voltage- divider between the regulator output and gnd with the midpoint connected to fbl to adjust the linear-regulator output. an error amplifier compares the fbl voltage with the 2.5v internal reference voltage and amplifies the dif- ference. if the feedback voltage is higher than the
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 12 ______________________________________________________________________________________ posb av dd outb 120k ? mmbd4148se (fairchild) mmbd4148se (fairchild) mmbd4148se (fairchild) 0.22 f 0.47 f 51.1k ? 20k ? 1 f r5 110k ? 1% r6 100k ? 1% 100k ? outb drvn fbn negb outl av dd 10v 300ma/500ma (max8710/MAX8761) vp 27v/20ma in gnd gnd in 10.8v to 13.2v in 0.1 f 10 f 4.7 f/10 f (max8710/MAX8761) 0.1 f 0.1 f 1 f 0.1 f 100k ? 0.1 f r3 325k ? 1% 0.1 f 20k ? gon ctl 0.1 f 0.1 f c1 47pf/22pf (max8710/MAX8761) r2 33.2k ? 1% r4 33.2k ? 1% r1 100k ? 1% goff -5v/50ma ref 5v/1ma shdn supb max8710 MAX8761 n.c. inl ref thr mode shdn dlp ctl drn gon src fbp drvp supcp fbl figure 1. max8710/MAX8761 typical operating circuit
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 13 posb av dd outb 120k ? mmbd4148se (fairchild) mmbd4148 2x mmbd4148se (fairchild) 0.22 f 0.47 f 1 f r5 110k ? 1% r6 100k ? 1% 100k ? outb drvn fbn negb outl av dd 10v/300ma gon 27v/20ma gnd gnd in 10.8v to 13.2v in 0.1 f 10 f 4.7 f 0.1 f 1 f 0.1 f r3 325k ? 1% 0.1 f 0.1 f c1 47pf r2 33.2k ? 1% r4 33.2k ? 1% r1 100k ? 1% goff -5v/50ma ref 5v/1ma shdn supb max8711 inl ref shdn dlp fbp drvp fbl 1 f 0.1 f figure 2. max8711 typical operating circuit
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 14 ______________________________________________________________________________________ mmbd4148se (fairchild) mmbd4148 2x mmbd4148se (fairchild) 0.22 f 0.47 f 1 f r5 110k ? 1% r6 100k ? 1% drvn fbn outl av dd 10v/300ma gon 27v/20ma gnd gnd in 10.8v to 13.2v in 0.1 f 10 f 4.7 f 1 f 0.1 f r3 325k ? 1% 0.1 f 0.1 f c1 47pf r2 33.2k ? 1% r4 33.2k ? 1% r1 100k ? 1% goff -5v/50ma ref 5v/1ma shdn max8712 inl ref dlp shdn fbp drvp fbl 1 f 0.1 f figure 3. max8712 typical operating circuit reference voltage, the controller lowers the base current of the pnp transistor, which reduces the amount of cur- rent delivered to the output. if the feedback voltage is too low, the device increases the pnp transistor? base cur- rent, which allows more current to pass to the output and raises the output voltage. the linear regulator also includes an output current limit that protects the internal pass transistor against short circuits. the input voltage range of the linear regulator is from 8v to 28v. the typical operating circuits shown use a 12v input. the output voltage range of the linear regulator (outl) is up to 28v (max8710/MAX8761) or up to 13.2v (max8711/max8712). the linear-regulator output is used to generate the av dd voltage, which is the analog supply rail for source-driver ics in tft lcd panels. the typical load of the av dd supply is a periodic pulsed load, with a peak current of approximately 1a and pulse width of approximately 2?. the typical period of the pulse load is between 8.9? and 31.7?. the excellent transient perfor- mance of the linear regulator can easily meet this tran- sient-response requirement. the linear regulator can deliver at least 300ma (500ma for the MAX8761) output current continuously with a 4.7? (10? for the MAX8761) output capacitor. do not allow the device power dissipation to exceed the pack- age-dissipation limit listed in the absolute maximum ratings section. the power dissipation can be estimated by multiplying the voltage difference between the input and the output with the required maximum continuous output current. for applications where the power dissipa- tion exceeds the package limit, see the external transistor for higher current or power dissipation section for more information.
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 15 fbn drvn dlp posb supb outb negb mode ctl ref v goff av dd vcom ctl av dd v in supcp av dd vp in gnd in ref ref max8710 MAX8761 shdn drvp fbp src ref v gon gon drn thr seq switch control osc inl outl fbl linear reg figure 4. max8710/MAX8761 functional diagram
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 16 ______________________________________________________________________________________ ref v supcp fbn 250mv 0.5 x v ref supcp drvn v neg c out(neg) c x(neg) d3 d4 c x(pos) v supcp v pos c out(pos) d2 d1 drvp fbp p2 n2 p1 n1 sequence oscillator max8710 MAX8761 figure 5. charge-pump regulator functional diagram the linear regulator is enabled whenever ref is in regula- tion and shdn is logic high. each time it is enabled, the linear regulator goes through a soft-start routine by ramp- ing up its internal reference voltage from 0 to 2.5v in 128 steps. the soft-start period is 2.73ms (typ), and fbl fault detection is disabled during this period. this soft-start feature effectively limits the inrush current during startup. the linear-regulator current-limit circuitry monitors the current flowing through the internal pass transistor. the internal current limit is approximately 800ma (1.1a for the MAX8761). the linear-regulator output declines when it is not able to supply the load current. if the fbl voltage drops below 0.75v, the current limit folds back to approximately 180ma (250ma for the MAX8761). the max8710/max8711/max8712/MAX8761 monitor the fbl voltage for undervoltage conditions. if v fbl is contin- uously below 2v (typ) for approximately 44ms, the device latches off. the foldback current-limit circuit, in conjunc- tion with the output undervoltage fault latch and thermal- overload protection, protects the output load and the internal pass transistor against short circuits or overloads. positive charge-pump regulator the positive charge-pump regulator is typically used to generate the positive supply rail for the tft lcd gate-dri- ver ics. the output voltage is set with an external resistive voltage-divider from its output to gnd with the midpoint connected to fbp. the number of charge-pump stages and the setting of the feedback divider determine the out- put voltage of the positive charge-pump regulator. the charge-pump driver includes a high-side p-channel mosfet (p1) and a low-side n-channel mosfet (n1) to control the power transfer as shown in figure 5. the mosfets switch at a constant frequency of 1.5mhz. during the first half-cycle, n1 turns on and allows v input (v supcp , max8710/MAX8761 or voutl, max8711/ max8712) to charge up the flying capacitor c x(pos) through diode d1. the amount of charge transferred from v input to c x(pos) is determined by the on-resis- tance of n1, which varies according to the output of the feedback error amplifier. the error amplifier compares the feedback signal (fbp) with a 2.5v internal reference and amplifies the difference. if the feedback signal is below the reference, the error-amplifier output increases the supply voltage of n1? gate driver, lowering the on- resistance. similarly, if the feedback signal is above the reference, the error-amplifier output reduces the driver supply voltage, increasing the on-resistance. during the second half-cycle, n1 turns off and p1 turns on, level shifting c x(pos) by v input volts. this connects c x(pos)
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 17 in parallel with the reservoir capacitor c out(pos) . if the voltage across c out(pos) plus a diode drop (v pos + v diode ) is smaller than the level-shifted flying-capacitor voltage (v cx(pos) + v input ), charge flows from c x(pos) to c out(pos) until diode d2 turns off. the positive charge-pump regulator? startup can be delayed by connecting an external capacitor from dlp to gnd. an internal constant current source begins charging the dlp capacitor when shdn is logic high and ref reaches regulation. when the dlp voltage exceeds v ref / 2, the positive charge-pump regulator is enabled. each time it is enabled, the positive charge- pump regulator goes through a soft-start routine by ramping up its internal reference voltage from 0 to 2.5v in 128 steps. the soft-start period is 2.73ms (typ), and fbp fault detection is disabled during this period. the soft-start feature effectively limits the inrush current dur- ing startup. the max8710/max8711/max8712/ MAX8761 also monitor the fbp voltage for undervolt- age conditions. if v fbp is continuously below 2v (typ) for approximately 44ms, the device latches off. negative charge-pump regulator the negative charge-pump regulator is typically used to generate the negative supply rail for the tft lcd gate- driver ics. the output voltage is set with an external resis- tive voltage-divider from its output to ref with the mid- point connected to fbn. the number of charge-pump stages and the setting of the feedback divider determine the output of the negative charge-pump regulator. the charge-pump driver includes a high-side p-channel mosfet (p2) and a low-side n-channel mosfet (n2) to control the power transfer as shown in figure 5. the mosfets switch a constant frequency of 1.5mhz. during the first half-cycle, p2 turns on and allows v input to charge up the flying capacitor c x(neg) through diode d3. during the second half-cycle, p2 turns off and n2 turns on, level shifting c x(neg) by v input volts. this connects c x(neg) in parallel with reservoir capacitor c out(neg) . if the voltage across c out(neg) minus a diode drop is greater than the voltage across c x(neg) , charge flows from c out(neg) to c x(neg) until diode d4 turns off. the amount of charge transferred to the output is controlled by the on-resistance of n2, which varies according to the output of the feedback error amplifier. the error amplifier compares the feedback sig- nal (fbn) with a 250mv internal reference and amplifies the difference. if the feedback signal is above the refer- ence, the error-amplifier output increases the supply volt- age of n2? gate driver, lowering the on-resistance. similarly, if the feedback signal is below the reference, the error-amplifier output reduces the driver supply voltage, increasing the on-resistance. the negative charge-pump regulator is enabled when shdn is logic high and ref reaches regulation. each time it is enabled, the negative charge-pump regulator goes through a soft-start routine by ramping down its internal reference voltage from 5v to 250mv in 128 steps. the soft-start period is 2.73ms (typ), and fbn fault detection is disabled during this period. the soft- start feature effectively limits the inrush current during startup. the max8710/max8711/max8712/MAX8761 also monitor the fbn voltage for undervoltage condi- tions. if v fbn is continuously above 700mv (typ) for approximately 44ms, the device latches off. operational amplifier (max8710/max8711/MAX8761) the max8710/max8711/MAX8761s?operational ampli- fier features high output current (150ma), fast slew rate (7.5v/?), and wide bandwidth (12mhz). the opera- tional amplifier is enabled when ref is in regulation and shdn is logic high. the output of the amplifier (outb) is internally pulled to ground through a 1k ? resistor in shutdown. the amplifier is typically used to drive the backplane (vcom) of tft lcd panels. the lcd backplane consists of a distributed series capacitance and resis- tance, a load that can be easily driven by this opera- tional amplifier. however, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. as the operational amplifier? capacitive load increases, the amplifier? bandwidth decreases, and its gain peaking increases. to ensure stable operation, a 5 ? to 50 ? resistor can be placed between outb and the capaci- tive load to reduce gain peaking. the operational amplifier limits short-circuit current to approximately ?50ma if the output is directly shorted to supb or to gnd. if the short-circuit condition persists, the junction temperature of the ic rises until it trips the ic? thermal-overload protection. reference voltage (ref) the reference output is nominally 5v and can source up to 1ma (see the typical operating characteristics ). bypass ref with a 0.22? ceramic capacitor connect- ed between ref and gnd. the reference remains enabled in shutdown.
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 18 ______________________________________________________________________________________ power-up sequence and shutdown control when the max8710/max8711/max8712/MAX8761 are powered up, ref rises with the voltage on in. after ref reaches regulation and if shdn is logic high, the linear regulator, operational amplifier, and negative charge- pump regulator are enabled and begin their respective soft-start routines. after the soft-start routines are com- pleted, the fault-protection circuits for the linear regulator and the negative charge-pump regulator are activated. when the linear regulator is enabled, the positive charge-pump-regulator delay block is enabled. an internal current source starts charging the dlp capaci- tor. the voltage on dlp linearly rises because of the constant charging current. when v dlp goes above v ref / 2, the switch control block is enabled, and the positive charge-pump regulator begins its soft-start. after the positive charge-pump regulator? soft-start is completed, the fault protection of the positive charge- pump regulator is also enabled. the max8710/max8711/max8712/MAX8761 enter into shutdown when shdn is pulled low or ref falls below 4.5v. in shutdown, outl and outb are internally pulled to ground with 1k ? resistors, fbn and fbp are internally pulled to ground with 10 ? resistors, and dlp is pulled to gnd through a 10 ? resistor, discharging c dlp . in the max8710 only, gon is pulled to gnd through a 1k ? resistor. ref remains on in shutdown. pulling shdn high when ref is above 4.5v reactivates the ic. output fault protection and thermal-overload protection can also turn off the ic? outputs. see the respective sections for details. output fault protection during steady-state operation, if the output of the linear regulator or any of the charge-pump regulator outputs does not exceed its respective fault-detection thresh- old, the max8710/max8711/max8712/MAX8761 acti- vate an internal fault timer. if any condition or the combination of conditions indicates a continuous fault for the fault-timer duration (44ms typ), the max8710/ max8711/max8712/MAX8761 set the fault latch, shutting down all the outputs except the reference. once the fault condition is removed, cycle the input voltage or toggle shdn to clear the fault latch and reactivate the device. each regulator? fault-detection circuit is disabled during the regulator? soft-start time. thermal-overload protection the thermal-overload protection prevents excessive power dissipation from overheating the ic. when the junction temperature exceeds +160 c, a thermal sensor immediately activates the fault protection, which shuts down all the outputs except the reference, allowing the device to cool down. once the device cools down by approximately 15 c, the ic restarts automatically. switch control (max8710/MAX8761) the max8710/MAX8761s' switch-control block (figures 6 and 7) consists of a high-voltage p-channel mosfet q1 between src and gon, and a common-source-con- nected p-channel mosfet pair q2 between gon and drn. the max8710 switch control block is enabled when v dlp goes above v ref / 2 and for MAX8761 v dlp has no control on switch control block. both the max8710 and MAX8761 have two different modes of operation. activate the first mode by connecting mode to ref. when ctl is logic high, q1 turns on and q2 turns off, connecting gon to src. when ctl is logic low, q1 turns off and q2 turns on, connecting gon to drn. gon can then be discharged through a resistor con- nected between drn and gnd or outl. q2 turns off and stops discharging gon when v gon reaches 10 times the voltage on thr. when v mode is less than 0.9 x v ref , the switch-control block works in the second mode. the rising edge of v ctl turns on q1 and turns off q2, connecting gon to src. an internal n-channel mosfet q5 between mode and gnd is also turned on to discharge an external capacitor between mode and gnd. the falling edge of v ctl turns off q5, and an internal 50? current source starts charg- ing the mode capacitor. once v mode exceeds 0.5 x v ref , the switch-control block turns off q1 and turns on q2, connecting gon to drn. gon can then be dis- charged through a resistor connected between drn and gnd or outl. q2 turns off and stops discharging gon when v gon reaches 10 times the voltage on thr.
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 19 ref 1k ? 9r r q3 q2 src gon drn thr q1 5 a 50 a ref r 4r 5r 1k ? q5 ctl mode q4 0.5 x v ref dlp fault shdn ref ok max8710 figure 6. max8710 high-voltage switch control
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 20 ______________________________________________________________________________________ 9r r q2 src gon drn thr q1 50 a ref r 4r 5r 1k ? q5 ctl mode fault ref ok MAX8761 figure 7. MAX8761 high-voltage switch control
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 21 design procedure linear regulator output-voltage selection adjust the linear-regulator output voltage by connecting a resistive voltage-divider from the linear-regulator out- put av dd to gnd with the center tap connected to fbl (figure 1). select the lower resistor of divider r2 in the 10k ? to 50k ? range. calculate upper resistor r1 with the following equation: where v fbl = 2.5v (typ) is the regulation point of the linear regulator. input-capacitor selection the linear regulator? output stage consists of a pnp pass transistor. rapid movements of the input voltage must be avoided since the movement can be coupled into the base of the transistor through the base-to-emitter junction capacitance. the input capacitor reduces the current peaks drawn from the input supply and slows down the input voltage movement. one 10? ceramic capacitor is used in the typical operating circuits (figures 1, 2, and 3) because of the high source impedance seen in typical lab setups. actual applications usually have much lower source impedance, since the linear regulator typically runs directly from the output of another regulated supply and can operate with less input capacitance. output-capacitor selection the output capacitor and its equivalent series resistance (esr) affect the linear regulator? stability and transient response. the max8710/max8711/max8712 can deliver at least 300ma continuously and are stable with a 4.7? output capacitor. the MAX8761 can deliver at least 500ma of output current and is stable with a 10? output capacitor. the typical load on the linear regulator for source-driver applications is a large pulsed load, with a peak current of approximately 1a and pulse width of approximately 2s. the shape of the pulse is close to a triangle, so it is equivalent to a square pulse with 1a height and 1s pulse width. the total voltage dip during the pulsed load transient also has two components: the ohmic dip due to the output capacitor? esr, and the capacitive dip caused by discharging the output capacitance: where i pulse is the height of the pulse load, and t pulse is the pulse width. higher capacitance and lower esr result in less voltage dip. the esr dip can be ignored when using ceramic output capacitors. calculate the minimum required capacitance for the maximum allowed dip using: the above equations are ?orst case?and assume that the linear regulator does not react to correct the output voltage during the load pulse. in fact, the regulator is fast enough to partially correct the output voltage, so the actual dip may be smaller, or a smaller capacitor may be acceptable. for the typical load pulse described above, assuming the voltage dip must be limited to 150mv, the minimum output capacitor is: because the regulator is able to limit the dip some- what, the circuit of figure 1 uses a 4.7?/10? (max8710/MAX8761) output capacitor. the voltage rating and temperature characteristics of the output capacitor must also be considered. feed-forward compensation the output capacitance and equivalent load resistance determine the dominant pole. an internal parasitic capacitance of the regulator creates a second pole. this pole typically occurs at 100khz, but can vary between 60khz and 140khz depending on the process variation. since the pole occurs after the loop gain crossover, it does not affect the loop stability. however, canceling this pole with an additional zero can improve the load-transient response. an additional zero improves the closed-loop phase margin, thereby improving the transient response. the feed-forward net- work should be designed to get maximum positive phase at unity gain frequency (f u ). a zero can be added by connecting a feed-forward capacitor (c1) between outl and fbl as shown in figure 1. the frequency of the zero can be calculated with the following equation: c as v f out min () . . = 11 015 67 c it v out min pulse pulse dip max () () vv v vir v it c dip dip esr dip c dip esr pulse esr dip c pulse pulse out () () () () =+ = rr v v avdd fbl 12 1 = ? ? ? ? ? ? ?
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 22 ______________________________________________________________________________________ where r1 is the upper resistor of the feedback divider and f u is the unity gain frequency. the unity gain fre- quency (f u ) for the max8710/max8711/max8712 is approximately 80khz; for MAX8761, f u is approximately 160khz. the value of r1 was calculated in the output- voltage selection section to set v outl . use the value for unity gain frequency (f u ), the ratio between v outl and v fbl , and r1 to calculate the value of c1. charge-pump regulators number of charge-pump stages for highest efficiency, always choose the lowest num- ber of charge-pump stages that meets the output requirement. the number of positive charge-pump stages is given by: where n pos is the number of positive charge-pump stages, v p is the positive charge-pump regulator output, v input is the supply voltage for the charge-pump regula- tors (v supcp , max8710/MAX8761 or v outl , max8711/ max8712), v diode is the forward-voltage drop of the charge-pump diode, and v switch is the voltage drop of the internal switches. use v switch = 0.3v. the number of negative charge-pump stages is given by: where n neg is the number of negative charge-pump stages and v goff is the negative charge-pump regula- tor output. the above equations are derived based on the assumption that the first stage of the positive charge pump is connected to v main and the first stage of the negative charge pump is connected to ground. sometimes fractional stages are more desirable for bet- ter efficiency. this can be done by connecting the first stage to another available supply, such as a 5v supply. if the first charge-pump stage is powered from 5v, then the above equations become: output-voltage selection adjust the positive charge-pump-regulator output volt- age by connecting a resistive voltage-divider from the regulator output v p to gnd with the center tap connect- ed to fbp (figure 1). select the lower resistor of divider r4 in the range of 10k ? to 50k ? . calculate upper resistor r3 with the following equation: where v fbp = 2.5v (typ) is the regulation point of the positive charge-pump regulator. adjust the negative charge-pump-regulator output volt- age by connecting a resistive voltage-divider from the negative charge-pump output v goff to ref with the center tap connected to fbn (figure 1). select r6 in the 20k ? to 100k ? range. calculate r5 with the follow- ing equation: where v ref = 5v and v fbn = 250mv is the regulation point of the negative charge-pump regulator. flying capacitor increasing the flying-capacitor (c x ) value lowers the effective source impedance and increases the output- current capability of the charge pump. increasing the capacitance indefinitely has a negligible effect on out- put-current capability because the internal switch resis- tance and the diode impedance place a lower limit on the source impedance. a 0.1f ceramic capacitor works well in most low-current applications. the flying capacitor? voltage rating must exceed the following: v cx > n x v input where n is the stage number in which the flying capaci- tor is used, and v input is the supply voltage for the charge-pump regulators (v supcp , max8710/MAX8761 or v outl , max8711/max8712). charge-pump input capacitor use an input capacitor with a value equal to or greater than the flying capacitor. place the capacitor as close to the ic as possible. connect the capacitor directly to pgnd. rr vv vv fbn goff ref fbn 56 = ? ? rr v v p fbp 34 1 = ? ? ? ? ? ? ? n vv v vv n vv v vv pos p switch input diode neg goff switch input diode = + = ++ ? ? ? ? 5 2 5 2 n vv vv neg goff switch input diode = + ? ? 2 n vv v vv pos p switch supcp input diode = + ? ? 2 ?= = ? zero u outl fbl rc vv 1 2 11 /
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies ______________________________________________________________________________________ 23 charge-pump output capacitor increasing the output capacitance or decreasing the esr reduces the output ripple voltage and the peak-to- peak transient voltage. with ceramic capacitors, the output voltage ripple is dominated by the capacitance value. use the following equation to approximate the required capacitor value: where c out_cp is the output capacitor of the charge pump, i load_cp is the load current of the charge pump, and v ripple_cp is the desired peak-to-peak value of the output ripple. charge-pump rectifier diode use low-cost silicon switching diodes with a current rat- ing equal to or greater than two times the average charge-pump input current. if it helps avoid an extra stage, some or all of the diodes can be replaced with schottky diodes with an equivalent current rating. applications information external transistor for higher current or power dissipation the load current and the voltage difference between the input and output determine the linear regulator? power dissipation as shown in the following equation: p dissipation = (v inl - v outl ) x i outl for some applications, the input voltage to the linear regulator is from a 19v adapter. to make a 10v output, the voltage across the pass transistor is 9v. in this case, the regulator? power dissipation may exceed the dissi- pation limit that the package can handle. in some other applications, the load current may be much higher than the regulator? guaranteed 300ma output current for the max8710/max8711/max8712 and 500ma for the MAX8761. the solution for such applications is to connect an exter- nal pnp transistor with the internal pnp transistor in a darlington configuration as shown in figure 8. the external pass transistor must be able to handle most of the power dissipation since most of the load current flows through it. on the other hand, the power dissipat- ed in the internal pass transistor is very low. the current- limit circuit does not work if an external pass transistor is used because the linear regulator only senses the cur- rent of the internal pass transistor. using the max1512 vcom calibrator to adjust the buffer output the operational amplifier is typically used as the vcom buffer in tft lcd panels. the output voltage of the vcom buffer can be adjusted using the max1512, which is an eeprom-programmable vcom calibrator, using the circuit shown in figure 9. refer to the max1512 data sheet for details. c i fv out cp load cp osc ripple cp _ _ _ 2 max8710 max8711 max8712 MAX8761 linear regulator 4.7 f 4.7 f inl outl fbl v in = 19v ksb834w (fairchild) avdd = 10v 51 ? 140k ? 20k ? figure 8. high-power linear regulator max8710 max8711 MAX8761 ref v dd gnd outl ce av dd out set ctl outb to vcom supb posb negb 20k ? 0.47 f 4.7 f 0.1 f 100k ? 25k ? max1512 figure 9. using the max1512 to adjust the v com buffer output
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies 24 ______________________________________________________________________________________ pc board layout guidelines careful pc board layout is important for proper opera- tion. use the following guidelines for good pc board layout: 1) create a power ground island consisting of the lin- ear-regulator input and output-capacitor ground connections, the gnd pin, and the capacitor ground connections for the charge-pump regula- tors. connect all these together with short, wide traces or a small ground plane. maximizing the width of the power ground traces improves efficien- cy. create an analog ground island consisting of all the feedback-divider ground connections, the oper- ational-amplifier divider ground connection, the ref capacitor ground connection, the mode capacitor ground connection, the dlp capacitor ground con- nection, and the device? exposed backside pad. connect the analog ground island and the power ground island by connecting the gnd pin directly to the exposed backside pad. make no other connec- tions between these separate ground islands. 2) place all feedback voltage-divider resistors as close to their respective feedback pins as possible. the divider? center trace should be kept short. placing the resistors far away causes their fb traces to become antennas that can pick up noise from the switching nodes of the charge pumps. avoid running any feedback trace near these switching nodes. 3) place in, inl, supb, supcp, and ref pin bypass capacitors close to the ic. the ground connection of the in bypass capacitor should be connected directly to the gnd pin with a wide trace. 4) minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. 5) minimize the size of the switching nodes (drvp and drvn). keep the switching nodes away from feed- back nodes (fbl, fbp, and fbn) and the analog ground. use dc traces as a shield if necessary. refer to the max8710 evaluation kit for an example of proper board layout. pin configurations (continued) 16 1234 12 11 10 9 15 14 13 5 6 7 8 fbn fbn outl drvn drvp dlp fbl dlp fbl shdn fbp supb outb gnd posb inl negb in outl drvn drvp ref top view thin qfn 4mm x 4mm 12 11 10 + + 4 5 6 12 inl 3 987 in fbp shdn gnd max8712 max8711 ref thin qfn 4mm x 4mm chip information max8710/max8711/max8712 transistor count: 3946 MAX8761 transistor count: 4127 process: bicmos
max8710/max8711/max8712/MAX8761 low-cost, linear-regulator lcd panel power supplies maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 25 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 24l qfn thin.eps package outline, 21-0139 2 1 e 12, 16, 20, 24, 28l thin qfn, 4x4x0.8mm package outline, 21-0139 2 2 e 12, 16, 20, 24, 28l thin qfn, 4x4x0.8mm

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